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- /*
- File: LynxFWIM.h
-
- Contains: Definitions for TI PCI-Lynx sample FWIM
-
- Version: 1.0
-
- Copyright: © 1998 by Apple Computer, Inc., all rights reserved.
-
- File Ownership:
-
- DRI: Eric Anderson
-
- Other Contact: Clinton Bauder
-
- Technology: FireWire
-
- Writers:
-
- (EA) Eric Anderson (ewa)
-
- Change History (most recent first):
-
- <FW2> 12/21/98 EA Checked in to main sources so we can build different.
- <FW1> 12/21/98 EA first checked in
- */
-
-
- #ifndef __LYNXFWIM__
- #define __LYNXFWIM__
-
- #ifndef __TYPES__
- #include <Types.h>
- #endif
- #ifndef __INTERRUPTS__
- #include <Interrupts.h>
- #endif
-
- #ifdef __cplusplus
- extern "C" {
- #endif
-
- #if PRAGMA_IMPORT_SUPPORTED
- #pragma import on
- #endif
-
- #if PRAGMA_ALIGN_SUPPORTED
- #pragma options align=power
- #endif
-
- /*zzz*/
- /* Isn't this PCI standard stuff? Shouldn't it be in some regular include */
- /* file like PCI.h? */
-
- #define bit0 0x00000001
- #define bit1 0x00000002
- #define bit2 0x00000004
- #define bit3 0x00000008
- #define bit4 0x00000010
- #define bit5 0x00000020
- #define bit6 0x00000040
- #define bit7 0x00000080
- #define bit8 0x00000100
- #define bit9 0x00000200
- #define bit10 0x00000400
- #define bit11 0x00000800
- #define bit12 0x00001000
- #define bit13 0x00002000
- #define bit14 0x00004000
- #define bit15 0x00008000
- #define bit16 0x00010000
- #define bit17 0x00020000
- #define bit18 0x00040000
- #define bit19 0x00080000
- #define bit20 0x00100000
- #define bit21 0x00200000
- #define bit22 0x00400000
- #define bit23 0x00800000
- #define bit24 0x01000000
- #define bit25 0x02000000
- #define bit26 0x04000000
- #define bit27 0x08000000
- #define bit28 0x10000000
- #define bit29 0x20000000
- #define bit30 0x40000000
- #define bit31 0x80000000
-
- /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
- * Configuration Registers
- *
- */
- enum {
- kConfigStart = 0x00,
- cwVendorID = 0x00, /* 0x1000 */
- cwDeviceID = 0x02, /* 0x0003 */
- cwCommand = 0x04,
- cwStatus = 0x06,
- clClassCodeAndRevID = 0x08,
- clHeaderAndLatency = 0x0C,
- clBaseAddressZero = 0x10, /* I/O Base address */
- clBaseAddressOne = 0x14, /* Memory Base address */
- clExpansionRomAddr = 0x30,
- clLatGntIntPinLine = 0x3C, /* Max_Lat, Max_Gnt, Int. Pin, Int. Line */
- kConfigEnd = 0x40
- };
-
- /*
- * 0x04 cwCommand Command Register (read/write)
- */
- enum {
- cwCommandSERREnable = bit8,
- cwCommandEnableParityError = bit6,
- cwCommandEnableBusMaster = bit2, /* Set this on initialization */
- cwCommandEnableMemorySpace = bit1, /* Respond at Base Address One if set */
- cwCommandEnableIOSpace = bit0 /* Respond at Base Address Zero if set */
- };
- /*
- * 0x06 cwStatus Status Register (read/write)
- */
- enum {
- cwStatusDetectedParityError = bit15, /* Detected from slave */
- cwStatusSignaledSystemError = bit14, /* Device asserts SERR/ signal */
- cwStatusMasterAbort = bit13, /* Master sets when transaction aborts */
- cwStatusReceivedTargetAbort = bit12, /* Master sets when target-abort */
- cwStatusDEVSELTimingMask = (bit10 | bit9), /* DEVSEL timing encoding R/O */
- cwStatusDEVSELFastTiming = 0,
- cwStatusDEVSELMediumTiming = bit9,
- cwStatusDEVSELSlowTiming = bit10,
- cwStatusDataParityReported = bit8
- };
-
- /*zzz*/
-
-
- ////////////////////////////////////////////////////////////////////////////////
- //
- // Useful macro defs.
- //
-
- #define EndianSwapImm32Bit(data32) \
- ( \
- (((UInt32) data32) >> 24) | \
- ((((UInt32) data32) >> 8) & 0xFF00) | \
- ((((UInt32) data32) << 8) & 0xFF0000) | \
- (((UInt32) data32) << 24) \
- )
-
-
-
- ////////////////////////////////////////////////////////////////////////////////
- //
- // FWIM data defs.
- //
-
- enum
- { // Default channel numbers. Some of these can change
- // or go away completely if more isochronous channels
- // are needed.
-
- kAsyncDMAWriteAccel = 0, // For hardware acceleration of incoming block writes.
- // can be re-used for isochronous if necessary.
- kAsyncDMAReadRxAccel = 1, // For hardware acceleration of incoming block writes.
- // can be re-used for isochronous if necessary.
- kAsyncReceiveDMA = 2, // Hard Coded. Needs to be LOWER priority than acceleration
- // otherwise this channel gets the packets instead.
- kAsyncDMAReadTxAccel = 3, // Used in conjunction with kAsyncDMAReadRxAccel.
- // Don't use until we are done with kDMARegisterAccess.
- kAsyncTransmitDMA = 4, // Hard Coded. Lowest priority (would rather receive)
- kDMARegisterAccess = 4, // Preferred channel for testing if the PHY is powered.
- // Shared with transmit DMA.
- kNumDMAChannels = 5, // Number of DMA channels.
- kPacketBufferSize = 2064, // Largest legal async packet is 2064
- // bytes (400 mb)
- kMaxBufPage = 8, // Max # of physical pages per packet
- kAsyncTxDonePCL = 0, // Async transmit done PCL index.
- kAsyncTxDummyPCL = 1, // Async transmit dummy PCL index.
- kAsyncTxDataPCL = 2, // Async transmit data PCL index.
- kNumAsyncTxPCLs = 3, // Number of PCLs for async transmit.
- kAsyncRxOverrunPCL = 0, // Async receive overrun PCL index.
- kAsyncRxDummyPCL = 1, // Async receive dummy PCL index.
- kAsyncRxFirstPacketPCL = 2, // First async receive packet PCL index.
- kAsyncBufs = 48, // # of Async bufs
- kAsyncRxLastPacketPCL = (kAsyncBufs - 1), // Last async receive packet PCL index.
- kAccelWriteDummyPCL = 0, // Dummy PCL which kicks off the circularly linked accleration PCL
- kAccelWritePCL = 1, // The PCL in circularly linked list which does the work
- kAccelReadDummyPCL = 0, // Dummy PCL which kicks off the circularly linked accleration PCL
- kAccelReadPCLThrottle = 1, // The PCL that pays attention to the busy bit
- kAccelReadPCLSpeedSort = 2, // The PCL in Tx circularly linked list which figures out what speed the incoming packet came in at
- kAccelReadRxPCL = 1, // The PCL in Rx circularly linked list which does the work
- kAccelReadTxPCL = 3, // The PCL in Tx circularly linked list which does the work
- kAccelReadRxPCLAux = 2, // The Aux PCL which turns channels on and off to keep Rx and Tx in Sync
- kAccelReadTxPCLAux = 6, // The Aux PCL which turns channels on and off to keep Rx and Tx in Sync
- kAccelReadTxPCLDone = 7, // The Aux PCL which Clears Busy and stops the channel
- kRegAccessDummyPCL = 0, // Offset of Reg Access Dummy PCL.
- kRegAccessPCL = 1 // Offset of Reg Access PCL.
- };
-
-
- // Strictly speaking, the "Lynx PHY" is the TSB21LV03.
- // If PCI-Lynx is used with another PHY, these constants may change.
- // These are all the same as the old TSB11C01DL PHY from the P1394 card.
- //
- // I'm now adding support for the TSB41LV06 (6 ports, 400Mb, 1394a) as well.
- // Hopefully this makes it more general as well. -DCB
-
- ////////////////////////////////////////////////////////////////////////////////
- //
- // Phy registers.
- //
-
- enum
- {
- kLynxPhyBit0 = (1 << 7),
- kLynxPhyBit1 = (1 << 6),
- kLynxPhyBit2 = (1 << 5),
- kLynxPhyBit3 = (1 << 4),
- kLynxPhyBit4 = (1 << 3),
- kLynxPhyBit5 = (1 << 2),
- kLynxPhyBit6 = (1 << 1),
- kLynxPhyBit7 = (1 << 0)
- };
-
- #define LynxPhyBitRange(start, end) \
- ( \
- (((((UInt32) 0xFF) << (start)) & 0xFF) >> \
- ((start) + (7 - (end)))) << \
- (7 - (end)) \
- )
-
- #define LynxPhyBitRangePhase(start, end) \
- (7 - end)
-
- // Phy register defs.
-
- // 1394 (TSB21LV03) PHY with old register set
- enum
- {
- kLynxPhyPhysicalIDAddress = 0,
- kLynxPhyPhysicalID = LynxPhyBitRange (0, 5),
- kLynxPhyPhysicalIDPhase = LynxPhyBitRangePhase (0, 5),
-
- kLynxPhyRAddress = 0,
- kLynxPhyR = kLynxPhyBit6,
-
- kLynxPhyCPSAddress = 0,
- kLynxPhyCPS = kLynxPhyBit7,
-
- kLynxPhyRHBAddress = 1,
- kLynxPhyRHB = kLynxPhyBit0,
-
- kLynxPhyIBRAddress = 1,
- kLynxPhyIBR = kLynxPhyBit1,
-
- kLynxPhyGCAddress = 1,
- kLynxPhyGC = LynxPhyBitRange (2, 7),
- kLynxPhyGCPhase = LynxPhyBitRangePhase (2, 7),
-
- kLynxPhySPDAddress = 2,
- kLynxPhySPD = LynxPhyBitRange (0, 1),
- kLynxPhySPDPhase = LynxPhyBitRangePhase (0, 1),
-
- kLynxPhyNPAddress = 2,
- kLynxPhyNP = LynxPhyBitRange (3, 7),
- kLynxPhyNPPhase = LynxPhyBitRangePhase (3, 7),
-
- kLynxPhyPortStatusAddress = 3,
- kLynxPhyAStat = LynxPhyBitRange (0, 1),
- kLynxPhyAStatPhase = LynxPhyBitRangePhase (0, 1),
-
- kLynxPhyBStat = LynxPhyBitRange (2, 3),
- kLynxPhyBStatPhase = LynxPhyBitRangePhase (2, 3),
-
- kLynxPhyPortStatus = LynxPhyBitRange (4, 5),
- kLynxPhyPortStatusPhase = LynxPhyBitRangePhase (4, 5),
- kLynxPhyCh = kLynxPhyBit4,
- kLynxPhyCon = kLynxPhyBit5,
-
- kLynxPhyCAddress = 6,
- kLynxPhyC = kLynxPhyBit7,
-
- kLynxPhyInvalidAddress = 15
- };
-
-
-
- // 1394a (TSB41LV06) PHY with Extended Register Set
- enum
- {
- kLynxExtPhyPhysicalIDAddress = 0,
- kLynxExtPhyPhysicalID = LynxPhyBitRange (0, 5),
- kLynxExtPhyPhysicalIDPhase = LynxPhyBitRangePhase (0, 5),
-
- kLynxExtPhyRAddress = 0,
- kLynxExtPhyR = kLynxPhyBit6,
-
- kLynxExtPhyCPSAddress = 0,
- kLynxExtPhyCPS = kLynxPhyBit7,
-
- kLynxExtPhyRHBAddress = 1,
- kLynxExtPhyRHB = kLynxPhyBit0,
-
- kLynxExtPhyIBRAddress = 1,
- kLynxExtPhyIBR = kLynxPhyBit1,
-
- kLynxExtPhyGCAddress = 1,
- kLynxExtPhyGC = LynxPhyBitRange (2, 7),
- kLynxExtPhyGCPhase = LynxPhyBitRangePhase (2, 7),
-
- kLynxExtPhyExtAddress = 2,
- kLynxExtPhyExt = LynxPhyBitRange (0, 2),
- kLynxExtPhyExtPhase = LynxPhyBitRangePhase (0, 2),
-
- kLynxExtPhyNPAddress = 2,
- kLynxExtPhyNP = LynxPhyBitRange (3, 7),
- kLynxExtPhyNPPhase = LynxPhyBitRangePhase (3, 7),
-
- kLynxExtPhySPDAddress = 3,
- kLynxExtPhySPD = LynxPhyBitRange (0, 1),
- kLynxExtPhySPDPhase = LynxPhyBitRangePhase (0, 1),
-
- kLynxExtPhyLinkAddress = 4,
- kLynxExtPhyLink = kLynxPhyBit0,
-
- kLynxExtPhyCntdAddress = 4,
- kLynxExtPhyCntd = kLynxPhyBit1,
-
- kLynxExtPhyDlyAddress = 4,
- kLynxExtPhyDly = LynxPhyBitRange (2, 3),
- kLynxExtPhyDlyPhase = LynxPhyBitRangePhase (2, 3),
-
- kLynxExtPhyIRAddress = 4,
- kLynxExtPhyIR = kLynxPhyBit4,
-
- kLynxExtPhyPwrAddress = 4,
- kLynxExtPhyPwr = LynxPhyBitRange (5, 7),
- kLynxExtPhyPwrPhase = LynxPhyBitRangePhase (5, 7),
-
- kLynxExtPhyISBRAddress = 5,
- kLynxExtPhyISBR = kLynxPhyBit1,
-
- kLynxExtPhyCTOIAddress = 5,
- kLynxExtPhyCTOI = kLynxPhyBit2,
-
- kLynxExtPhyCPSIAddress = 5,
- kLynxExtPhyCPSI = kLynxPhyBit3,
-
- kLynxExtPhySTOIAddress = 5,
- kLynxExtPhySTOI = kLynxPhyBit4,
-
- kLynxExtPhyDPSIAddress = 5,
- kLynxExtPhyDPSI = kLynxPhyBit5,
-
- kLynxExtPhyEAAAddress = 5,
- kLynxExtPhyEAA = kLynxPhyBit6,
-
- kLynxExtPhyEMSCAddress = 5,
- kLynxExtPhyEMSC = kLynxPhyBit7,
-
- kLynxExtPhyPingAddres = 6,
- kLynxExtPhyPing = LynxPhyBitRange (0, 7),
- kLynxExtPhyPingPhase = LynxPhyBitRangePhase (0, 7),
-
- kLynxExtPhyPortAddres = 7,
- kLynxExtPhyPort = LynxPhyBitRange (3, 7),
- kLynxExtPhyPortPhase = LynxPhyBitRangePhase (3, 7),
-
- kLynxExtPhyAStatnAddress = 8,
- kLynxExtPhyAStatn = LynxPhyBitRange (0, 1),
- kLynxExtPhyAStatnPhase = LynxPhyBitRangePhase (0, 1),
-
- kLynxExtPhyBStatnAddress = 8,
- kLynxExtPhyBStatn = LynxPhyBitRange (2, 3),
- kLynxExtPhyBStatnPhase = LynxPhyBitRangePhase (2, 3),
-
- kLynxExtPhyPortStatusnAddress = 8,
- kLynxExtPhyPortStatusn = LynxPhyBitRange (4, 5),
- kLynxExtPhyPortStatusnPhase = LynxPhyBitRangePhase (4, 5),
-
- kLynxExtPhyChnAddress = 8,
- kLynxExtPhyChn = kLynxPhyBit4,
-
- kLynxExtPhyConnAddress = 8,
- kLynxExtPhyConn = kLynxPhyBit5,
-
- kLynxExtPhyBiasnAddress = 8,
- kLynxExtPhyBiasn = kLynxPhyBit6,
-
- kLynxExtPhyDisnAddress = 8,
- kLynxExtPhyDisn = kLynxPhyBit7,
-
- kLynxExtPhyPeerSpdnAddress = 9,
- kLynxExtPhyPeerSpdn = LynxPhyBitRange (0, 1),
- kLynxExtPhyPeerSpdnPhase = LynxPhyBitRangePhase (0, 1),
-
- kLynxExtPhyInvalidAddress = 10
- };
-
-
- ////////////////////////////////////////////////////////////////////////////////
- //
- // Lynx register file.
- //
-
- enum
- {
- kLynxBit0 = (1 << 0),
- kLynxBit1 = (1 << 1),
- kLynxBit2 = (1 << 2),
- kLynxBit3 = (1 << 3),
- kLynxBit4 = (1 << 4),
- kLynxBit5 = (1 << 5),
- kLynxBit6 = (1 << 6),
- kLynxBit7 = (1 << 7),
- kLynxBit8 = (1 << 8),
- kLynxBit9 = (1 << 9),
- kLynxBit10 = (1 << 10),
- kLynxBit11 = (1 << 11),
- kLynxBit12 = (1 << 12),
- kLynxBit13 = (1 << 13),
- kLynxBit14 = (1 << 14),
- kLynxBit15 = (1 << 15),
- kLynxBit16 = (1 << 16),
- kLynxBit17 = (1 << 17),
- kLynxBit18 = (1 << 18),
- kLynxBit19 = (1 << 19),
- kLynxBit20 = (1 << 20),
- kLynxBit21 = (1 << 21),
- kLynxBit22 = (1 << 22),
- kLynxBit23 = (1 << 23),
- kLynxBit24 = (1 << 24),
- kLynxBit25 = (1 << 25),
- kLynxBit26 = (1 << 26),
- kLynxBit27 = (1 << 27),
- kLynxBit28 = (1 << 28),
- kLynxBit29 = (1 << 29),
- kLynxBit30 = (1 << 30),
- kLynxBit31 = (1 << 31)
- };
-
- #define LynxBitRange(start, end) \
- ( \
- ((((UInt32) 0xFFFFFFFF) << (31 - (end))) >> \
- ((31 - (end)) + (start))) << \
- (start) \
- )
-
- #define LynxBitRangePhase(start, end) \
- (start)
-
-
- // As far as I can tell these are all 1394 constants
- // I think they could be moved to FireWire.h
- // Link Data Format defs.
- // (Erik's note: actually, these are supposed to be FWIM specific,
- // but for some reason, I didn't name them that way. We should change
- // the names to kLynx...
-
- enum
- {
- kLynxTCodeSelfID = 16
- };
-
- enum
- {
- kFWPacketTCode = FWBitRange (24, 27),
- kFWPacketTCodePhase = FWBitRangePhase (24, 27)
- };
-
-
- enum
- {
- kFWAsynchSpd = FWBitRange (14, 15),
- kFWAsynchSpdPhase = FWBitRangePhase (14, 15),
-
- kFWAsynchTLabel = FWBitRange (16, 21),
- kFWAsynchTLabelPhase = FWBitRangePhase (16, 21),
-
- kFWAsynchRt = FWBitRange (22, 23),
- kFWAsynchRtPhase = FWBitRangePhase (22, 23),
- kFWAsynchNew = 0,
- kFWAsynchRetryA = 2,
- kTIAsycnhRetryB = 3,
-
- kFWAsynchPriority = FWBitRange (28, 31),
- kFWAsynchPriorityPhase = FWBitRangePhase (28, 31),
-
- kFWAsynchDestinationID = FWBitRange (0, 15),
- kFWAsynchDestinationIDPhase = FWBitRangePhase (0, 15),
-
- kFWAsynchSourceID = FWBitRange (0, 15),
- kFWAsynchSourceIDPhase = FWBitRangePhase (0, 15),
-
- kFWAsynchDestinationOffsetHigh = FWBitRange (16, 31),
- kFWAsynchDestinationOffsetHighPhase = FWBitRangePhase (16, 31),
-
- kFWAsynchDestinationOffsetLow = FWBitRange (0, 31),
- kFWAsynchDestinationOffsetLowPhase = FWBitRangePhase (0, 31),
-
- kFWAsynchDataLength = FWBitRange (0, 15),
- kFWAsynchDataLengthPhase = FWBitRangePhase (0, 15),
-
- kFWAsynchExtendedTCode = FWBitRange (16, 31),
- kFWAsynchExtendedTCodePhase = FWBitRangePhase (16, 31),
-
- kFWAsynchAckSent = FWBitRange (28, 31),
- kFWAsynchAckSentPhase = FWBitRangePhase (28, 31),
-
- kFWAsynchRCode = FWBitRange (16, 19),
- kFWAsynchRCodePhase = FWBitRangePhase (16, 19)
- };
-
- enum
- {
- kLynxIsochTCode = LynxBitRange (4, 7),
- kLynxIsochTCodePhase = LynxBitRangePhase (4, 7),
-
- kLynxIsochTag = LynxBitRange (14, 15),
- kLynxIsochTagPhase = LynxBitRangePhase (14, 15),
-
- kLynxIsochErrCode = FWBitRange (28, 31),
- kLynxIsochErrCodePhase = FWBitRangePhase (28, 31)
- };
-
-
- // Lynx DMA Packet Control List
- // (not part of register file, but pointed to by next struct)
-
- struct LynxPCLBufferStruct
- {
- UInt32 control;
- UInt32 *address;
- };
- typedef struct LynxPCLBufferStruct LynxPCLBuffer, *LynxPCLBufferPtr;
-
- struct LynxPCLStruct
- {
- UInt32 *nextPCL;
- UInt32 *nextPCLAlt;
- UInt32 refCon;
- UInt32 status;
- UInt32 remaining;
- UInt32 *nextAddress;
- LynxPCLBuffer buffer[13];
- };
- typedef struct LynxPCLStruct LynxPCL, *LynxPCLPtr;
-
- // Lynx DMA channel structure
- // (one in register file for each channel)
-
- struct LynxChannelStruct
- {
- volatile UInt32 prevPCLAddrTemp;
- volatile UInt32 curPCLAddr;
- volatile UInt32 curDataBufferAddr;
- volatile UInt32 status;
- volatile UInt32 control;
- volatile UInt32 ready;
- volatile UInt32 curState;
- volatile UInt32 reserved1C;
- };
- typedef struct LynxChannelStruct LynxChannel, *LynxChannelPtr;
-
- // Constants used in Lynx PCLs and some DMA registers
-
- enum
- {
- kLynxDMA_NOP = 0,
- kLynxDMA_RCV = 1,
- kLynxDMA_XMT = 2,
- kLynxDMA_LOAD = 3,
- kLynxDMA_STORE_QUAD = 4,
- kLynxDMA_STORE0 = 5,
- kLynxDMA_STORE1 = 6,
- kLynxDMA_BRANCH = 7,
- kLynxDMA_PCI_TO_LBUS = 8,
- kLynxDMA_LBUS_TO_PCI = 9,
- kLynxDMA_RCV_AND_UPDATE = 10,
- kLynxDMA_STORE_DOUBLE = 11,
- kLynxDMA_UNFORMATTED_XMT = 12,
- kLynxDMA_ADD = 13,
- kLynxDMA_COMPARE = 14
- };
-
- enum
- {
- kLynxDMAWaitNone = 0,
- kLynxDMAWaitReady1 = 1,
- kLynxDMAWaitReady0 = 2,
- kLynxDMAWaitExternal1 = 3,
- kLynxDMAWaitExternal0 = 4,
- kLynxDMAWaitGPIO2 = 5,
- kLynxDMAWaitGPIO3 = 6,
- kLynxDMAWaitReserved = 7
- };
-
- enum
- {
- kLynxDMA100mbps = 0,
- kLynxDMA200mbps = 1,
- kLynxDMA400mbps = 2
- };
-
- enum
- {
- kLynxAuxPCLCompareEnable = LynxBitRange (16, 31),
- kLynxAuxPCLCompareEnablePhase = LynxBitRangePhase (16, 31),
-
- kLynxAuxPCLCompareValue = LynxBitRange (0, 15),
- kLynxAuxPCLCompareValuePhase = LynxBitRangePhase (0, 15)
- };
-
- enum
- {
- kLynxAuxConditionNone = 0,
- kLynxAuxConditionDMAReady1 = 1,
- kLynxAuxConditionDMAReady0 = 2,
- kLynxAuxConditionExtReady1 = 3,
- kLynxAuxConditionExtReady0 = 4,
- kLynxAuxConditionGPIO2Active = 5,
- kLynxAuxConditionGPIO3Active = 6
- };
-
- // Lynx DMA channel comparator structure
- // (one in register file for each channel)
-
- struct LynxComparatorStruct
- {
- volatile UInt32 value0;
- volatile UInt32 mask0;
- volatile UInt32 value1;
- volatile UInt32 mask1;
- };
- typedef struct LynxComparatorStruct LynxComparator, *LynxComparatorPtr;
-
- // FIFO size and threshold defs.
- //
- // 0x00 / 0x80 / 0x80 rarely overflows or underruns
- //
- // 0x80 / 0x40 / 0x40 seems to work for isochronous transmit
- //
-
-
- enum
- {
- kDefaultITFSize = 0x00,
- kDefaultITFThreshold = 0xFF,
-
- kDefaultATFSize = 0x80,
- kDefaultATFThreshold = 0x77,
-
- kDefaultGRFSize = 0x80,
-
- kIsochTransmitModeITFSize = 0x80,
- kIsochTransmitModeITFThreshold = 0x17,
-
- kIsochTransmitModeATFSize = 0x40,
- kIsochTransmitModeATFThreshold = 0x37,
-
- kIsochTransmitModeGRFSize = 0x40
- };
-
-
- // Stuff for the serial EEPROM
-
- enum
- {
- kLynxMinEEPROMQuads = 64, // 256 bytes / 2048 bits
- kLynxMaxEEPROMQuads = 512, // 2048 bytes / 16384 bits
-
- kLynxEEPROMKeyModuleVendorID = 0x03,
- kLynxEEPROMKeyModuleHardwareVersion = 0x04,
- kLynxEEPROMKeyNodeHardwareVersion = 0x09,
- kLynxEEPROMKeyModuleDependentInfo = 0xc7,
- kLynxEEPROMKeySramQuads = 0x39,
- kLynxEEPROMKeyAuxRamQuads = 0x3a,
- kLynxEEPROMKeyAuxDevice = 0x3b,
-
- kClockHi = 1, // These are supposed to make
- kClockLo = 0, // the code easier to read.
- kDataHi = 1, // Putting "LynxEEPROMControl"
- kDataLo = 0, // in each one would not help.
- kNoData = 2,
- kStartTimer = 1,
- kNoTimer = 0
- };
-
-
- // This is the raw data in the EEPROM, up to the Root directory
- // These names are probably not standard
-
- struct LynxEEPROMBaseStruct
- {
- UInt32 pciConfig[4]; // Details unknown, but bytes 3..6 == PCI ID 104c,8003
- UInt8 infoLen;
- UInt8 crcLen;
- UInt16 crc;
- UInt32 busInfoBlock[4];
- UInt32 romData[kLynxMaxEEPROMQuads];
- };
- typedef struct LynxEEPROMBaseStruct LynxEEPROMBase, *LynxEEPROMBasePtr;
-
-
- // This is data derived from the EEPROM. Technically the location
- // within the EEPROM could vary from chip to chip, so extract it here.
-
- struct LynxEEPROMInfoStruct
- {
- UInt32 busInfoBlock[4];
- UInt32 module_Vendor_Id;
- UInt32 module_Hardware_Version;
- UInt32 node_Hardware_Version;
- UInt32 sram_Quads;
- UInt32 auxRam_Quads;
- UInt32 aux_Device;
- };
- typedef struct LynxEEPROMInfoStruct LynxEEPROMInfo, *LynxEEPROMInfoPtr;
-
-
- // Lynx register file
-
- struct LynxRegistersStruct
- {
- volatile UInt32 configID;
- volatile UInt32 configStatusCommand;
- volatile UInt32 configClassRevID;
- volatile UInt32 configControlInfo;
- volatile UInt32 lynxBase;
- volatile UInt32 sramBase; // if any
- volatile UInt32 auxRamBase; // if any
- volatile UInt32 reserved01C;
- volatile UInt32 reserved020;
- volatile UInt32 reserved024;
- volatile UInt32 reserved028;
- volatile UInt32 configSubSystem;
- volatile UInt32 rplROMBase;
- volatile UInt32 reserved034;
- volatile UInt32 reserved038;
- volatile UInt32 interruptMisc;
- volatile UInt32 miscControl;
- volatile UInt32 serialEEPROMControl;
- volatile UInt32 pciInterruptStatus;
- volatile UInt32 pciInterruptEnable;
- volatile UInt32 pciTest;
- volatile UInt32 reserved054thru0AC[23];
- // 0x0B0
- volatile UInt32 localBusControl;
- volatile UInt32 localBusAddress;
- volatile UInt32 gpioControlA;
- volatile UInt32 gpioControlB;
- volatile UInt32 gpioData[16]; // will define if needed
- // 0x100
- LynxChannel dmaChannel[64]; // only 0..4 valid
- // 0x900
- volatile UInt32 dmaDiagTest;
- volatile UInt32 dmaReceiveCount;
- volatile UInt32 dmaGlobal;
- volatile UInt32 reserved90cthruA00[61];
- // 0xA00
- volatile UInt32 fifoSize;
- volatile UInt32 pciFifoPort;
- volatile UInt32 linkFifoPort;
- volatile UInt32 fifoControlStatus;
- volatile UInt32 fifoControlEnableAndTest;
- volatile UInt32 fifoTransmitThreshold;
- volatile UInt32 reservedA18;
- volatile UInt32 reservedA1C;
- volatile UInt32 grfPopPush0;
- volatile UInt32 grfPopPush1;
- volatile UInt32 reservedA28;
- volatile UInt32 reservedA2C;
- volatile UInt32 atfPopPush0;
- volatile UInt32 atfPopPush1;
- volatile UInt32 reservedA38;
- volatile UInt32 reservedA3C;
- volatile UInt32 itfPopPush0;
- volatile UInt32 itfPopPush1;
- volatile UInt32 reservedA48thruAFC[46];
- // 0xB00
- LynxComparator dmaComparator[64]; // only 0..4 valid
- // 0xF00
- volatile UInt32 busNumberNodeNumber;
- volatile UInt32 linkControl;
- volatile UInt32 cycleTimer;
- volatile UInt32 phyControl;
- volatile UInt32 diagTestControl;
- volatile UInt32 linkInterruptStatus;
- volatile UInt32 linkInterruptEnable;
- volatile UInt32 retryCountInterval;
- volatile UInt32 stateMachineVectorMonitor;
- volatile UInt32 fifoOverUnderErrorCounters;
- // length 0xF28
- };
- typedef struct LynxRegistersStruct LynxRegisters, *LynxRegistersPtr;
-
-
- // Enums for selected registers, etc.
-
- // miscControl register
-
- enum
- {
- kLynxMAXRTY_CNT = LynxBitRange (12, 15),
- kLynxMAXRTY_CNTPhase = LynxBitRangePhase (12, 15),
- kLynxENA_MST_RTY = kLynxBit11,
- kLynxENA_POST_WR = kLynxBit7,
- kLynxENA_SLV_BURST = kLynxBit6,
- kLynxPAUSE_MSTR = kLynxBit3,
- kLynxAUTOBOOT_IN = kLynxBit2,
- kLynxSET_FORCE_INT = kLynxBit1,
- kLynxSWRST = kLynxBit0
- };
-
- // serialEEPROMControl register
-
- enum
- {
- kLynxEEPERR = kLynxBit9,
- kLynxEEPCHKERR = kLynxBit8,
- kLynxNOTPRS = kLynxBit7,
- kLynxEEPCLK = kLynxBit6,
- kLynxEEPENA = kLynxBit5,
- kLynxEEPDAT = kLynxBit4,
- kLynxEEPSTARTRD = kLynxBit2,
- kLynxTIMER_5USEC = kLynxBit0
- };
-
- // pciInterruptStatus and pciInterruptEnable
-
- enum
- {
- kLynxINT_PEND = kLynxBit31,
- kLynxFRC_INT = kLynxBit30,
- kLynxSLV_ADR_PERR = kLynxBit28,
- kLynxSLV_DAT_PERR = kLynxBit27,
- kLynxMST_DAT_PERR = kLynxBit26,
- kLynxMST_DEV_TO = kLynxBit25,
- kLynxMST_RETRY_TO = kLynxBit24,
- kLynxINTERNAL_SLV_TO = kLynxBit23,
- kLynxAUX_TO = kLynxBit18,
- kLynxAUX_INT = kLynxBit17,
- kLynxP1394_INT = kLynxBit16,
- kLynxDMA4_PCL = kLynxBit9,
- kLynxDMA4_HLT = kLynxBit8,
- kLynxDMA3_PCL = kLynxBit7,
- kLynxDMA3_HLT = kLynxBit6,
- kLynxDMA2_PCL = kLynxBit5,
- kLynxDMA2_HLT = kLynxBit4,
- kLynxDMA1_PCL = kLynxBit3,
- kLynxDMA1_HLT = kLynxBit2,
- kLynxDMA0_PCL = kLynxBit1,
- kLynxDMA0_HLT = kLynxBit0
- };
-
- // some missing
-
- // GPIO Control Register A and B
-
- enum
- {
- kLynxGPIO_OUT_EN0 = kLynxBit0,
- kLynxGPIO_POL_OUT0 = kLynxBit2,
- kLynxGPIO_SRC0 = LynxBitRange (8, 12),
- kLynxGPIO_SRC0Phase = LynxBitRangePhase (8, 12),
-
- kLynxGPIO_OUT_EN1 = kLynxBit16,
- kLynxGPIO_POL_OUT1 = kLynxBit18,
- kLynxGPIO_SRC1 = LynxBitRange (24, 28),
- kLynxGPIO_SRC1Phase = LynxBitRangePhase (24, 28),
-
- kLynxGPIO_OUT_EN2 = kLynxBit0,
- kLynxGPIO_POL_OUT2 = kLynxBit2,
- kLynxGPIO_SRC2 = LynxBitRange (8, 12),
- kLynxGPIO_SRC2Phase = LynxBitRangePhase (8, 12),
-
- kLynxGPIO_OUT_EN3 = kLynxBit16,
- kLynxGPIO_POL_OUT3 = kLynxBit18,
- kLynxGPIO_SRC3 = LynxBitRange (24, 28),
- kLynxGPIO_SRC3Phase = LynxBitRangePhase (24, 28)
-
- };
-
- // DMA Channel Current Packect control List Address
-
- enum
- {
- kLynxCPLADR = LynxBitRange (1, 31),
- kLynxCPLADRPhase = LynxBitRangePhase (1, 31),
- kLynxCPLVALID = kLynxBit0,
- kLynxCPLINVALID = kLynxBit0 // TI named it backwards (1 == invalid)
- };
-
- // DMA Channel status
-
- enum
- {
- kLynxInvalidStatus = kLynxBit0,
-
- kLynxISO_MODE = kLynxBit30,
- kLynxMstErr = kLynxBit29,
- kLynxPktErr = kLynxBit28,
- kLynxPktCmp = kLynxBit27,
- kLynxReceiveDma_Cha = LynxBitRange (21, 26),
- kLynxReceiveDma_ChaPhase = LynxBitRangePhase (21, 26),
- kLynxRcv_Speed = LynxBitRange (19, 20),
- kLynxRcv_SpeedPhase = LynxBitRangePhase (19, 20),
- kLynxAcks = LynxBitRange (15, 18),
- kLynxAcksPhase = LynxBitRangePhase (15, 18),
- kLynxAck_Type = kLynxBit14,
- kLynxTransferredCount = LynxBitRange (0, 12),
- kLynxTransferredCountPhase = LynxBitRangePhase (0, 12)
- };
-
- // DMA channel control
-
- enum
- {
- kLynxDMA_CH_ENA = kLynxBit31,
- kLynxDMA_BSY = kLynxBit30,
- kLynxDMA_LINK = kLynxBit29,
- kLynxDMA_CMD = LynxBitRange (24, 27),
- kLynxDMA_CMDPhase = LynxBitRangePhase (24, 27),
- kLynxDMA_WAIT_SEL = LynxBitRange (20, 22),
- kLynxDMA_WAIT_SELPhase = LynxBitRangePhase (20, 22),
- kLynxDMA_BRANCH_SEL = LynxBitRange (20, 22),
- kLynxDMA_BRANCH_SELPhase = LynxBitRangePhase (20, 22),
- kLynxDMA_INT = kLynxBit19,
- kLynxDMA_LAST_BUF = kLynxBit18,
- kLynxDMA_WAIT_FOR_STATUS = kLynxBit17,
- kLynxDMA_BIG_ENDIAN = kLynxBit16,
- kLynxDMA_xmit_spd_code = LynxBitRange (14, 15),
- kLynxDMA_xmit_spd_codePhase = LynxBitRangePhase (14, 15),
- kLynxDMA_Multi_ISO = kLynxBit13,
- kLynxDMA_Tramsmit_ISO = kLynxBit12,
- kLynxDMA_TransferCount = LynxBitRange (0, 11),
- kLynxDMA_TransferCountPhase = LynxBitRangePhase (0, 11)
- };
-
- // DMA ready
-
- enum
- {
- kLynxDMAReadyCONDITION = kLynxBit0
- };
-
- // DMA state
-
- // etc
-
- // FIFO Size
-
- enum
- {
- kLynxITF_FIFOSZ = LynxBitRange (16, 23),
- kLynxITF_FIFOSZPhase = LynxBitRangePhase (16, 23),
- kLynxATF_FIFOSZ = LynxBitRange (8, 15),
- kLynxATF_FIFOSZPhase = LynxBitRangePhase (8, 15),
- kLynxGRF_FIFOSZ = LynxBitRange (0, 7),
- kLynxGRF_FIFOSZPhase = LynxBitRangePhase (0, 7)
- };
-
- // FIFO index read/write port [dangerous to write]
-
- enum
- {
- kLynxITF_WAB = kLynxBit26,
- kLynxATF_WAB = kLynxBit25,
- kLynxGRF_WAB = kLynxBit24,
- kLynxITF_PTR = LynxBitRange (16, 23),
- kLynxITF_PTRPhase = LynxBitRangePhase (16, 23),
- kLynxATF_PTR = LynxBitRange (8, 15),
- kLynxATF_PTRPhase = LynxBitRangePhase (8, 15),
- kLynxGRF_PTR = LynxBitRange (0, 7),
- kLynxGRF_PTRPhase = LynxBitRangePhase (0, 7)
- };
-
- // FIFO Control Token Status
-
- enum
- {
- kLynxGRF_FCT32 = kLynxBit1,
- kLynxTF_FCT32 = kLynxBit0
- };
-
- // FIFO Control and test Register
-
- enum
- {
- kLynxTEXT_MUX = LynxBitRange (8, 11),
- kLynxTEXT_MUXPhase = LynxBitRangePhase (8, 11),
- kLynxGRF_FLUSH = kLynxBit4,
- kLynxITF_FLUSH = kLynxBit3,
- kLynxATF_FLUSH = kLynxBit2,
- kLynxFORCE_BIG_ENDIAN = kLynxBit1,
- kLynxFCT33_WR = kLynxBit0
- };
-
- // ATH/ITF Threshold Control
-
- enum
- {
- kLynxATF_TRSHLD = LynxBitRange (8, 15),
- kLynxATF_TRSHLDPhase = LynxBitRangePhase (8, 15),
- kLynxITF_TRSHLD = LynxBitRange (0, 7),
- kLynxITF_TRSHLDPhase = LynxBitRangePhase (0, 7)
- };
-
- // DMA stuff
-
- // Word 0 Receive Packet Compare Value Register @B00 B10 B20 B30 B40
-
- // Word 0 Receive Packet Compare Enable Register @B04 B14 B24 B34 B44
-
- enum
- {
- kLynxCMP0_FIELD1_MASK = LynxBitRange (16, 31),
- kLynxCMP0_FIELD1_MASKPhase = LynxBitRangePhase (16, 31),
- kLynxCMP0_FIELD2_MASK = LynxBitRange (8, 15),
- kLynxCMP0_FIELD2_MASKPhase = LynxBitRangePhase (8, 15),
- kLynxCMP0_FIELD3_MASK = LynxBitRange (4, 7),
- kLynxCMP0_FIELD3_MASKPhase = LynxBitRangePhase (4, 7),
- kLynxCMP0_FIELD4_MASK = LynxBitRange (0, 3),
- kLynxCMP0_FIELD4_MASKPhase = LynxBitRangePhase (0, 3),
-
- kLynxIsotCodeNormal = 0x09,
- kLynxAsynctCodeNormal = 0x0A,
-
- kLynxMatchIsochChannel = LynxBitRange (0, 5),
- kLynxMatchIsochChannelAndTag = LynxBitRange (0, 7)
- };
-
- // Word 1 mask (comparator) [b0c, b1c, etc]
-
- enum
- {
- kLynkDEST_ID_SEL_BusNode = kLynxBit11,
- kLynxRCV_SELF_ID_EN = kLynxBit10,
- kLynxEN_DIRECT_ADR = kLynxBit9,
- kLynxEN_CH_COMPARE = kLynxBit8,
- kLynxWRITE_REQ_ACK_SEL = kLynxBit7
- };
-
- // 1394 Bus Number and Node Number
-
- enum
- {
- kLynxBUS_ID = LynxBitRange (22, 31),
- kLynxBUS_IDPhase = LynxBitRangePhase (22, 31),
- kLynxNODE_ID = LynxBitRange (16, 21),
- kLynxNODE_IDPhase = LynxBitRangePhase (16, 21),
- kLynxBUS_NODE_ID = LynxBitRange (16, 31),
- kLynxBUS_NODE_IDPhase = LynxBitRangePhase (16, 31)
- };
-
- // 1394 Link Layer Control
-
- enum
- {
- kLynxBUSY_CNTRL = kLynxBit29,
- kLynxTX_ISO_EN = kLynxBit26,
- kLynxRX_ISO_EN = kLynxBit25,
- kLynxTX_ASYNC_EN = kLynxBit24,
- kLynxRX_ASYNC_EN = kLynxBit23,
- kLynxRSTTX = kLynxBit21,
- kLynxRSTRX = kLynxBit20,
- kLynxCYCMASTER = kLynxBit11,
- kLynxCYCSOURCE = kLynxBit10,
- kLynxCYCTIMEREN = kLynxBit9,
- kLynxRCV_COMP_VALID = kLynxBit7
- };
-
- // 1394 Cycle Timer
-
- enum
- {
- kLynxCYCLE_NUMBER = LynxBitRange (12, 31),
- kLynxCYCLE_NUMBERPhase = LynxBitRangePhase (12, 31),
- kLynxCYCLE_OFFSET = LynxBitRange (0, 11),
- kLynxCYCLE_OFFSETPhase = LynxBitRangePhase (0, 11)
- };
-
- // PHY
-
- enum
- {
- kLynxRDPHY = kLynxBit31,
- kLynxWRPHY = kLynxBit30,
- kLynxPHY_REG_ADR = LynxBitRange (24, 27),
- kLynxPHY_REG_ADRPhase = LynxBitRangePhase (24, 27),
- kLynxPHY_REG_DAT = LynxBitRange (16, 23),
- kLynxPHY_REG_DATPhase = LynxBitRangePhase (16, 23),
- kLynxPHY_REGRD_ADR = LynxBitRange (8, 11),
- kLynxPHY_REGRD_ADRPhase = LynxBitRangePhase (8, 11),
- kLynxPHY_REGRD_DAT = LynxBitRange (0, 7),
- kLynxPHY_REGRD_DATPhase = LynxBitRangePhase (0, 7)
- };
-
- // Diagnostic Test Control
-
- // 1394 Link Layer Interrupt Status Register and Enable Register
-
- enum
- {
- kLynxLINK_INT = kLynxBit31,
- kLynxPHY_TIME_OUT = kLynxBit30,
- kLynxPHY_REG_RCVD = kLynxBit29,
- kLynxPHY_BUSRESET = kLynxBit28,
- kLynxTX_RDY = kLynxBit26,
- kLynxRX_DATA_RDY = kLynxBit25,
- kLynxIT_STUCK = kLynxBit20,
- kLynxAT_STUCK = kLynxBit19,
- kLynxSNTRJ = kLynxBit17,
- kLynxHDR_ERR = kLynxBit16,
- kLynxTC_ERR = kLynxBit15,
- kLynxCYC_SEC = kLynxBit11,
- kLynxCYC_STRT = kLynxBit10,
- kLynxCYC_DONE = kLynxBit9,
- kLynxCYC_PEND = kLynxBit8,
- kLynxCYC_LOST = kLynxBit7,
- kLynxCYC_ARB_FAILED = kLynxBit6,
- kLynxGRF_OVER_FLOW = kLynxBit5,
- kLynxITF_UNDER_FLOW = kLynxBit4,
- kLynxATF_UNDER_FLOW = kLynxBit3,
- kLynxIARB_FAILED = kLynxBit0
- };
-
- // Busy retry register
-
- enum
- {
- kLynxBUSY_RETRY_DLY = LynxBitRange (8, 15),
- kLynxBUSY_RETRY_DLYPhase = LynxBitRangePhase (8, 15),
- kLynxBUSY_RETRY_CNT = LynxBitRange (0, 7),
- kLynxBUSY_RETRY_CNTPhase = LynxBitRangePhase (0, 7)
- };
-
- // State machine
-
- // Under/Over counters
-
- // Lynx's Packet Control Token for GRF:
-
- enum
- {
- kLynxGrfPctPKTBD = kLynxBit31,
- // missing
- kLynxGrfPctISO = kLynxBit17,
- kLynxGrfPctSELF_ID = kLynxBit16
- // missing
- };
-
- // Lynx's Packet Control Token for ATF:
-
- enum
- {
- kLynxAtfPctPKTBNDRY = kLynxBit31
- // missing
- // missing
- };
-
- // Defs for handling asynch receive overflow.
-
- enum
- {
- kLynxNumAsyncRxPCLsToPrime = 20
- };
-
- // Defs for pending FWIM commands.
-
- enum
- {
- kLynxPendingFWIMCommandBusy = 1
- };
-
-
- struct LynxDMAChannelInfoStruct
- {
- FWDeferredTaskID lynxDT; // A deferred task for this guy
- UInt32 channelType; // What kind of DMA we're doing on this channel
- DCLProgramID dclProgram; // Used to lookup what Channel is used for which DCL Program
- Boolean lynxDTScheduled; // True if the DT is scheduled
- Boolean inUse; // True if this channel is being used
- UInt8 pad[2];
- };
- typedef struct LynxDMAChannelInfoStruct
- LynxDMAChannelInfo,
- *LynxDMAChannelInfoPtr;
-
- // Defs for channelType
- enum
- {
- kChannelUnused, // Should be obvious
- kAsyncXmit, // Asynchronous Transmit
- kAsyncRcv, // Asynchronous Receive
- kAsyncWriteAccel, // block write acceleration for nnnn.0000.mmmm.mmmm
- kAsyncReadAccelRx, // block read acceleration for nnnn.0000.mmmm.mmmm Rx Channel for incoming requests
- kAsyncReadAccelTx, // block read acceleration for nnnn.0000.mmmm.mmmm Tx Channel for response w/Data
- kIsochXmit, // Asynchronous Transmit
- kIsochRcv // Asynchronous Receive
- };
-
- struct LynxIsochPortDataStruct
- {
- DCLProgramID dclProgramID, // ID of DCL program we're using.
- originalDCLProgramID, // Original DCL program ID.
- translatedDCLProgramID; // Translated DCL program ID.
- UInt32 channelNum; // Isoch channel number used for this port.
- UInt32 dmaChannel; // actual DMA channel used for this guy.
- UInt32 speed; // Speed of this port.
- Boolean talking; // True if port is for talking.
- };
- typedef struct LynxIsochPortDataStruct
- LynxIsochPortData,
- *LynxIsochPortDataPtr;
-
- struct LynxAsyncRxPCLDataStruct
- {
- LynxPCLPtr pNextPCL; // Logical pointer to next PCL.
- struct LynxFWIMDataStruct *pLynxFWIMData; // Pointer to Lynx FWIM data.
- Ptr pPCLPhysical; // Physical pointer to PCL.
- Ptr packetBuffer; // Logical packet buffer of PCL.
- FWIMProcessAsynchParams fwimProcessAsynchParams; // Params for processing received requests.
- };
- typedef struct LynxAsyncRxPCLDataStruct
- LynxAsyncRxPCLData,
- *LynxAsyncRxPCLDataPtr;
-
- struct LynxAsyncTxPCLDataStruct
- {
- LynxPCLPtr pNextPCL; // Logical pointer to next PCL.
- struct LynxFWIMDataStruct *pLynxFWIMData; // Pointer to Lynx FWIM data.
- Ptr pPCLPhysical; // Physical pointer to PCL.
- };
- typedef struct LynxAsyncTxPCLDataStruct
- LynxAsyncTxPCLData,
- *LynxAsyncTxPCLDataPtr;
-
- typedef struct LynxDCLProgramInterruptQueueElementStruct
- LynxDCLProgramInterruptQueueElement,
- *LynxDCLProgramInterruptQueueElementPtr;
-
- struct LynxDCLProgramInterruptQueueElementStruct
- {
- LynxDCLProgramInterruptQueueElementPtr
- pPrevDCLInterrupt; // Link to previous interrupt queue element.
- DCLCommandPtr pDCLCommand; // Pointer to DCL command that caused interrupt.
- };
-
- enum
- {
- kPendingResetRequestsAllowed = 5 // number of pending reset requests allowed
- };
-
- struct PendingResetReqStruct // holds a pending bus reset request
- {
- Boolean inUse;
- FWIMCommandParamsPtr pPendingResetRequest;
- };
- typedef struct PendingResetReqStruct
- PendingResetReq,
- *PendingResetReqPtr;
-
- // Private data structure for LynxFWIM - one per Lynx
-
- struct LynxFWIMDataStruct
- {
- // Some fields within this struct will be physically addressed by commands in a PCL program.
- // We will only map the first page of this struct physically, so these fields must be within
- // the first page. So don't rearrange this part of the struct.
-
- LynxDCLProgramInterruptQueueElementPtr
- pDCLInterruptTail[kNumDMAChannels]; // Tails of DCL interrupt queues.
- LynxDCLProgramInterruptQueueElementPtr
- pDCLLastInterrupt[kNumDMAChannels]; // The last DCL command serviced
- volatile UInt32 asyncTxDoneFlag; // Flag indicating that asynchronous transmit has finished.
- UInt32 asyncRxOverflowSetLinkControl; // Value to set link control register with on receive overflow.
- UInt32 asyncRxOverflowSetPCLComparator;// Value to set PCL comparator register with on receive overflow.
- UInt32 asyncRxOverflowFlag; // Flag indicating an overflow in async receive.
- UInt32 accelReadTXBusy; // Flag indicating we are busy transmitting a read response
- UInt32 accelReadTxThrottle; // Flag telling DMA to stop
-
- // Nothing below this line will be accessed via physical addresses
-
- PhysicalAddress fwimDataPhys; // Physical address of this struct
- IOPreparationTable fwimDataIOPrep; // ioPrep data for this struct
- IOPreparationID atfIOPreparationID; // ioPrepID for current asynch transmit request
- FWIMID fwimID; // ID for this FWIM
- RegEntryID FWIMRegEntryID; // Name registry ID for TI card.
- UInt32 generation; // Current bus generation number.
- Boolean generationValid; // Generation number is valid.
- Boolean root; // True if we're root.
- Boolean lynxPad0[2]; // Pad to long word
-
- TimerID holdoffResetRequestsTimerID; // TimerID for holding off bus reset requests
- TimerID requestTimeoutTimerID; // TimerID to indicate timeout of a read/write request
- FWDeferredTaskID busResetDeferredTaskID; // Deferred task ID for handling bus resets.
-
- LynxDMAChannelInfo DMAInfo[kNumDMAChannels]; // Deferred tasks and other info per channel
- // including allocation and in use flags
- UInt32 asyncRxDMA; // Channel allocated for Async Receive used for quick access
- UInt32 asyncTxDMA; // Channel allocated for Async Transmit used for quick access
- UInt32 asyncAccelWriteDMA; // Channel allocated for Async Write Acceleration used for quick access
- UInt32 asyncAccelReadRxDMA; // Channel allocated for Async Read Acceleration used for quick access
- UInt32 asyncAccelReadTxDMA; // Channel allocated for Async Read Acceleration used for quick access
-
- FWDeferredTaskID miscInterruptDeferredTaskID; // Deferred task ID for handling misc interrupts.
-
- Boolean holdoffResetRequestsTimerSet; // Flag indicating the ResetRequests timer is running
- Boolean requestTimeoutTimerSet; // Flag indicating the Timeout timer is running
- Boolean busResetDTScheduled; // True if we've scheduled a DT to handle bus resets.
- Boolean miscInterruptDTScheduled; // True if we've sceduled a DT to handle misc interrupts.
-
- UInt32 miscInterrupt; // Miscellaneous interrupt to deal with
- FWIMCommandParamsPtr pPendingFWIMCommand; // Pending FWIM command.
- OSStatus pendingFWIMCommandStatus; // Internal status of pending FWIM command.
- FWIMCommandParamsPtr pPendingFWIMResponseCommand; // Pending FWIM response command.
- UInt32 transactionLabel; // Label used for current transaction
- UInt32 tCode; // TCode for current transaction.
- DCLCommandPtr pCurrentDCLCommand; // Pointer to current DCL command.
- InterruptSetMember interruptSetMember;
- void *oldInterruptRefCon;
- InterruptHandler oldInterruptHandler;
- InterruptEnabler interruptEnabler;
- InterruptEnabler interruptOldEnabler;
- InterruptDisabler interruptDisabler;
- InterruptDisabler interruptOldDisabler;
- LynxRegistersPtr pLynxRegisters; // Register file
-
- Ptr asyncBuf[kAsyncBufs]; // Non-isoch
- Ptr asyncBufPhys[kAsyncBufs]; // Physical addrs
-
- LynxPCL *asyncXmitPCL; // two for transmit
- Ptr asyncXmitPCLPhys; // Physical addrs
- LynxPCLPtr pNextAsyncTxPCL; // Pointer to next active async transmit PCL to process.
- LynxPCLPtr pLastAsyncTxPCL; // Pointer to last active async transmit PCL.
- LynxPCLPtr asyncTxDonePCLSegment; // PCL segment to deal with finished async transmit.
- LynxAsyncTxPCLDataPtr lynxAsyncTxPCLDataList; // List of data records for async transmit PCLs.
-
- LynxPCL *asyncPCL; // async PCL loop
- LynxPCLPtr pNextAsyncPCL; // Next async receive PCL to process.
- LynxPCLPtr pLastAsyncPCL; // Last available async receive PCL.
- LynxPCLPtr pStartAsyncRxPCL; // Async receive PCL to start receive program.
- UInt32 numAsyncRxPCLsPrimed; // Number of receive PCLs primed.
- LynxPCLPtr asyncRxOverflowPCLSegment; // PCL segment to deal with async receive overflow.
- Ptr asyncPCLPhys; // Physical addrs
- LynxAsyncRxPCLDataPtr lynxAsyncRxPCLDataList; // List of data records for async receive PCLs.
- Ptr asyncXmitBuf; // For Async xmit
- Ptr asyncXmitBufPhys; // Physical
- IOPreparationTable ioPrep; // For VM
- PhysicalAddress physAddrs[kAsyncBufs+20]; // Page table - fix this •••
- LynxIsochPortDataPtr lynxIsochPortDataList[kNumDMAChannels]; // List of isoch port data records.
- SInt32 isochTransmitMode; // > 0 if we're in isochronous transmit mode. 1 per XMIT channel
- UInt32 pageSize, // Physical page size and shift for VM.
- pageShift;
- UInt32 bitBucket; // Bit bucket to dump stuff into.
- Boolean eepromValid; // True if we have read and CRCed the EEPROM
- Boolean lynxPad3[3]; // Pad to long word
- UInt32 eepromData[kLynxMinEEPROMQuads]; // Raw EEPROM quads
- LynxEEPROMInfo eepromInfo; // Info derived from EEPROM
- TimerID delayedResetTimerID; // (temporary hack)
- Boolean delayedResetTimerSet; // Flag indicating the above timer is running
-
- UInt8 lastPhyReg0; // Last known value of PHY register zero
- Boolean extendedPhyRegs; // True if we have a 1394a PHY with the extended register set
- Boolean receiveLocalSelfID; // True if PHY sends us our own self ID
- TimerID phyRegTimerID; // If the above is true we need to wait a bit to see if we get a
- // PHYRegReceived interrupt later. If not the data from the previous
- // one was valid so we can use it.
-
- UInt32 lastARDMA; // ARDMA PCL last time we sent a bus reset
- UInt32 lastFIFOa; // FIFO pointers last time we sent a bus reset
- UInt32 lastFIFOb; // FIFO pointers last time we sent a bus reset
- PendingResetReqPtr pResetRequestList; // list to hold bus reset requests
-
- UInt32 localSelfIDQuads[8]; // Support lots of ports. Overkill probably
- LynxPCLPtr selfIDPackets; // Leave this here til we inform the FSL and
- // then recycle the PCL
- Ptr selfIDPacketBuffer; // The actual self-id packets
- UInt32 selfIDPacketSize; // Size of the packet containing the self IDs.
- UInt32 numPHYPorts; // Number of ports supported by the PHY
- SInt32 fwimBusy; // Non zero if we are busy and don't want to re-enter our SIHs
-
- LynxPCLPtr asyncAccelWritePCLPhys; // Physical addrs
- LynxPCLPtr asyncAccelWritePCLLog; // Pointer to one of the two PCLs in the loop.
-
- LynxPCLPtr asyncAccelReadPCLRxPhys; // Physical addrs
- LynxPCLPtr asyncAccelReadPCLRxLog; // Pointer to one of the PCLs in the loop.
-
- LynxPCLPtr asyncAccelReadPCLTxPhys; // Physical addrs
- LynxPCLPtr asyncAccelReadPCLTxLog; // Pointer to one of the PCLs in the loop.
-
- UInt8 * asyncAccelReadHeaderLog; // Logical Pointer to the buffer for our outgoing packet header
- UInt8 * asyncAccelReadHeaderPhys; // Physical Pointer to the buffer for our outgoing packet header
-
- LynxPCLPtr phyRegAccessLog; // Logical addr of PCL used to
- LynxPCLPtr phyRegAccessPhys; // Pointer to one of the PCLs in the loop.
-
- SInt32 intsDisabledCount; // Number of times interrupts have been disabled
- UInt32 interruptMask; // What interrupts should be enabled.
-
- SInt32 phyRegAccessStack; // Used to prevent re-entrant PHY access from using the same PCL
- SInt32 phyNotPowered; // non-zero if PHY isn't powered.
- TimerID phyPowerTimerID; // TimerID for waiting for PHY Power
-
- UInt32 interruptValues[4]; // For debugging - last 4 interrupts
- UInt32 *csrROMUpdateClearWhenDone; // For OHCI example.
-
- Ptr baseFWIMDataPtr; // Actual Ptr returned by PoolAllocateResident
- Ptr basePCLData; // Ditto
- Ptr baseRxData; // Ditto
- Ptr baseTxData; // Ditto
-
- Boolean phyNodeThoughtValid; // True if we we think the Node ID is valid but we saw a reset interrupt
- // at the same time we processed the phyRegReceived interrupt.
- Boolean lynxPad4[3]; // Pad to long word
-
- };
- typedef struct LynxFWIMDataStruct LynxFWIMData, *LynxFWIMDataPtr;
-
- enum
- {
- kPCLPoolSize = 100,
- kPCLAlignmentMask = 0xFFFFFF80
- };
-
- typedef struct LynxPCLPoolDataStruct
- LynxPCLPoolData,
- *LynxPCLPoolDataPtr;
- struct LynxPCLPoolDataStruct
- {
- LynxPCLPoolDataPtr pNextLynxPCLPoolData; // Link to next PCL pool data record.
- UInt32 nextFreePCL; // Next free PCL in pool.
- LynxPCLPtr alignedPCLPoolBase; // 128-byte-aligned PCL pool base address.
- UInt32 alignedPCLPoolBasePhys; // Physical addr of same
- LogicalAddress poolAllocatedAddress; // Actual allocated address
- IOPreparationTable ioPrep; // For VM
- PhysicalAddress physAddrs[20]; // warning, arbitrary constant
- UInt32 isochPacketHeader; // Storage for isoch packet header.
- PhysicalAddress isochPacketHeaderPhys; // Physical addr of previous UInt32
- LynxPCL pclPoolDummy[kPCLPoolSize]; // Space for PCL pool array.
- };
-
- enum
- {
- kLynxPCLUnknownType = 0,
- kLynxPCLStartType = 1,
- kLynxPCLTransferType = 2,
- kLynxPCLAuxType = 3
- };
-
- enum
- {
- kLynxPhysicalBuffer = 0,
- kLynxLogicalBuffer = 1
- };
-
- struct LynxDCLCompilerEngineDataStruct
- {
- LynxFWIMDataPtr pLynxFWIMData; // Our FWIM data.
- LynxPCLPtr pStartPCL; // Pointer to first PCL in compiled program.
- LynxPCLPoolDataPtr pLynxPCLPoolDataList; // List of PCL pools allocated for this copmiled program.
- UInt32 *isochPacketHeaderPtr; // Storage for isoch packet header.
- PhysicalAddress isochPacketHeaderPhys; // Phys addr stolen from PCL pool
- UInt32 engineGeneration; // For faster lookups
- IOPreparationTable ioPrep; // For all buffers/etc
- PhysicalAddress *physAddrs; // Page table (of sorts)
- };
- typedef struct LynxDCLCompilerEngineDataStruct
- LynxDCLCompilerEngineData,
- *LynxDCLCompilerEngineDataPtr;
-
- struct LynxPCLBuildStateStruct
- {
- LynxFWIMDataPtr pLynxFWIMData; // Our FWIM data.
- LynxDCLCompilerEngineDataPtr
- pLynxDCLCompilerEngineData; // Compiler engine data.
- UInt32 pclChannelNum; // PCL channel number we're building for.
- LynxPCLPoolDataPtr pLynxPCLPoolDataList; // List of PCL pools allocated for this build.
- LynxPCLPtr pFirstPCL; // First physical PCL for this logical PCL.
- LynxPCLPtr pCurrentPCL; // Current working PCL.
- UInt32 currentBuffer; // Current working buffer in PCL.
- UInt32 lastBuffer; // Last unallocated buffer.
- UInt32 bufferAllocationSize; // Amount allocated from current allocation buffer.
- UInt32 pclType; // Start, transfer, or aux.
- UInt32 refCon; // Ref con.
- UInt32 commandWord; // Command word if this is a transfer PCL.
- Boolean interrupt; // True if we want to generate an interrupt.
- UInt32 isochChannelNum; // Isochronous channel number.
- };
- typedef struct LynxPCLBuildStateStruct LynxPCLBuildState, *LynxPCLBuildStatePtr;
-
- struct LynxPCLLabelStruct
- {
- LynxPCLPtr pLabelLynxPCL; // PCL that label refers to.
- LynxPCLPtr *pLabelDependencyList; // List of label dependencies.
- };
- typedef struct LynxPCLLabelStruct LynxPCLLabel, *LynxPCLLabelPtr;
-
- #if PRAGMA_ALIGN_SUPPORTED
- #pragma options align=reset
- #endif
-
- #if PRAGMA_IMPORT_SUPPORTED
- #pragma import off
- #endif
-
- #ifdef __cplusplus
- }
- #endif
-
- #endif /* __LYNXFWIM__ */
-